Rules
Every public rule in rules_vivado, grouped by the build phase it
belongs to. All of them resolve their Xilinx install through a
registered vivado_toolchain.
Project setup
vivado_create_project— emit a Vivado project without running synthesis (useful for IDE handoff).
Synthesis
vivado_synthesize— run synthesis from an HDL library and produce a synthesis checkpoint (.dcp).vivado_synthesis_optimize— post-synthesis optimization pass on a synthesis checkpoint.
Implementation
vivado_placement— placement on a synthesis checkpoint.vivado_place_optimize— post-placement optimization on a placement checkpoint.vivado_routing— routing on a placement checkpoint.
Bitstream
vivado_write_bitstream— emit the final.bit(and optionally.xsa) from a routing checkpoint.
End-to-end flow
vivado_flow— convenience macro (loaded from@rules_vivado//vivado:defs.bzl) that chains synthesis → opt → placement → place-opt → routing → bitstream into one target name. See the Quick start for a worked example.
IP packaging
vivado_create_ip— package an HDL module as a Vivado IP core.vivado_interface_definition— generate IP-XACT bus + abstraction definitions from a SystemVerilog interface.vivado_create_interface_ip— register an interface definition as an IP catalog entry so block designs can use it.
Simulation
xsim_test— run a Vivado XSim simulation as a Bazeltesttarget.
Toolchain
vivado_toolchain— declare a Vivado install for toolchain resolution. See Toolchains for the full workflow.
Providers
VivadoToolchainInfoand friends — the providers passed between phases (VivadoSynthCheckpointInfo,VivadoPlacementCheckpointInfo,VivadoRoutingCheckpointInfo,VivadoIPBlockInfo,VivadoInterfaceInfo).